High Performance VLSI Architecture of Universal Serial Bus Finite State Machines Based on Different Encoding Methods

Vol.2 No.1

Year: 2007

Issue: Jul-Sep

Title: High Performance VLSI Architecture of Universal Serial Bus Finite State Machines Based on Different Encoding Methods   

Author Name: Ruckmani S.R, Anbalagan P   

Synopsis:   

Finite state machines have become popular in today’s world, VLSI methods for implementing them are preferred. The universal serial bus technology comes as a response to the increasing demands for unified interfaces and the need for flexible easy-to-use products for personal computers. Integrating this technology in to PBXs, ISDN ICs and multimedia communication systems can play an important role in the integration of telecommunication and computer technologies. In this paper experimental comparison has been done on the performance of Universal Serial Bus finite state machines based on their encoding types are designed and implemented family of Field Programmable Gate Array (FPGA). The various parameter like the power and area occupied, are compared. The proposed asynchronous finite state machine in such a way that an One-Shot-Coding of their states is possible. The characteristic of One-Shot-Codes for finite state machines result in some properties of the realized sequential networks. The main advantage is less power dissipation, better electromagnetic compatibility and very fast circuits because only one bit changes between all successive states. Compared with existing coding, the proposed coding results in area reduction of 43% and power consumption decrease of 82%.